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ASIC/FPGA Design Verification Engineer

Company: Solidus Technical Solutions
Location: Lexington
Posted on: September 25, 2022

Job Description:

Solidus is searching for a ASIC/FPGA Design Verification Engineer. Candidate will join a team that specializes in advanced network and communications systems development, with a focus on rapid prototyping of radical next generation tactical mobile, military airborne communications systems. Successful individual will participate in the verification effort of wireless communications systems. The team is developing novel new architectures and waveforms and needs an engineer to prototype and field test the technologies. This individual will be a key member of the hardware team, working closely with the designers to develop the verification environment, test plans and functionality of the FPGA and ASIC Designs. Requirements - Active Secret Clearance - Bachelors Degree - 7 years relevant experience Required Experience - Successful completion of ASIC / FPGA design / verification cycles from architecting and creation of ASIC/FPGA test environment to demonstration on hardware - Solid verification skills, which includes planning, debugging, random testing, black box testing and adversarial testing for Xilinx FPGAs and Vivado - ASIC verification - Solid verification experience working with VHDL Designs using VHDL or System Verilog - Strong C/C++ and scripting i.e., TCL and Python - Experience in Testplan definition, Testbench design and development, coverage specification and analysis and automation of the regression test suite Additionally Desired - Proficient in OS-VVM, UVM, or other functional verification methodologies - Strong understanding of fundamentals of wireless digital communications systems and all PHY processes from data in to baseband I/Q out - Clearly articulate the function of all digital blocks in a typical communications chain i.e., encoders, modulators, correlators, etc. - MATLAB Job ID 4565 Applicants selected must meet eligibility requirements for access to classified information. U.S. Citizenship may be required. Solidus is an Equal Opportunity Employer and participates in E-Verify. NOTICE OF AFFIRMATIVE ACTION PLAN FOR INDIVIDUALS WITH DISABILITIES, DISABLED VETERANS AND OTHER PROTECTED VETERANS. It is the policy of this Company to seek and employ qualified individuals at all locations and facilities, and to provide equal employment opportunities for all applicants and employees in recruiting, hiring, placement, training, compensation, insurance, benefits, promotion, transfer, and termination. To achieve this, we are dedicated to taking affirmative action to employ and advance in employment qualified individuals with disabilities, disabled veterans, and other protected veterans. The objective in adopting the Affirmative Action Programs is to place qualified individuals with disabilities, disabled veterans and other protected veterans in all job classifications. These Affirmative Action Programs are available for inspection by any applicant or employee by contacting the Companys EEO Coordinator, in the Human Resources office, Monday through Friday, 8am to 5pm. Please Note: Solidus does not accept applications from agencies, 3rd party vendors, or applications with incomplete information.

Keywords: Solidus Technical Solutions, Boston , ASIC/FPGA Design Verification Engineer, Engineering , Lexington, Massachusetts

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